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NXP Semiconductors /LPC43xx /SGPIO /CLR_EN_1

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Interpret as CLR_EN_1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CLR_EN_CCI0RESERVED

Description

Exchange clock interrupt clear mask

Fields

CLR_EN_CCI

1 = Exchange clock interrupt clear mask of slice n.
RESERVED

Reserved.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data